.. _About: About ##### .. _About:Admin: Working Group Administration ============================ Working group officers: * *Chair*: Jim Lewis (`JimLewis@eda-twiki `__, `JimLewis@gitlab `__) * *Vice Chair*: Patrick Lehmann (`PatrickLehmann@eda-twiki `__, `paebbels@gitlab `__) * *Vice Chair*: Rob Gaddi (`RobGaddi@eda-twiki `__, `rgaddi@gitlab `__) * *Secretary*: Unai Martinez-Corral (`UnaiCorral@eda-twiki `__, `umarcor@gitlab `__) Documents: * `Working Group Roster `__ - private to working group - login first * `Voting Information `__ * `2008-2019 IEEE Approved Project Authorization Request (PAR) `__ * IEEE: * Patent Policy - `IEEE Slides `__ - in `IEEE Bylaws `__ * `Antitrust Policy `__ .. toctree:: :maxdepth: 1 OperatingProcedures How to add users ---------------- How to add someone to: * Mail reflector/list. * `TWIKI `__. * GitLab. .. _About:Standards: VHDL Standards ============== VHDL standards are available through `IEEE standards association `__. * IEEE 1076: * `1076-2019 `__. * `1076-2008 `__ aka IEC 61691-1-1:2011. * `1076-2002 `__ aka IEC 61691-1-1 Ed.1 (2004-10). * `1076-2000 `__. * `1076-1993 `__. * `1076-1987 `__. * `IEEE 1076.1 `__ VHDL Analog and Mixed-Signal (VHDL-AMS): * 1076.1.1: VHDL Analog and Mixed-Signal Extensions---Packages for Multiple Energy Domain Support (stdpkgs) * IEEE 1076.2: VHDL Math Package (``math_real``) (part of 1076 starting with 1076-2008) * IEEE 1076.3: VHDL Synthesis Package (vhdlsynth) (``numeric_std``) (fphdl) (part of 1076 starting with 1076-2008) * IEEE 1076.4: Timing (VHDL Initiative Towards ASIC Libraries: VITAL) * IEEE 1076.6: VHDL RTL Synthesis 2004, 1999 (deprecated by DASC) * IEEE 1164: VHDL Multivalue Logic Packages (``std_logic_1164``) (part of 1076 starting with 1076-2008)